1. Field
Apparatuses and methods consistent with exemplary embodiments of the inventive concept relate to semiconductor devices, and more particularly, to scan chain circuits and integrated circuits including scan chain circuits.
2. Description of the Related Art
A scan chain circuit includes a plurality of flip-flops that are coupled in series. In the scan chain circuit, an input terminal of each flip-flop is coupled to an output terminal of a previous flip-flop, and an output terminal of each flip-flop is coupled to an input terminal of a next flip-flop. The scan chain circuit is a design for test (DFT) circuit for efficiently testing a semiconductor device, such as an integrated circuit, and may be used in a scan test. Further, the scan chain circuit may be used in utilizing data sensed from an electrical fuse (e-fuse).